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mongoose / examples / nRF51 / http / config / nrf_drv_config.h @ eaef5bd1

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/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
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 *
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 * The information contained herein is property of Nordic Semiconductor ASA.
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 * Terms and conditions of usage are described in detail in NORDIC
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 * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
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 *
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 * Licensees are granted free, non-transferable use of the information. NO
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 * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
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 * the file.
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 *
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 */
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/* clang-format off */
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#ifndef NRF_DRV_CONFIG_H
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#define NRF_DRV_CONFIG_H
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/* CLOCK */
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#define CLOCK_CONFIG_XTAL_FREQ          NRF_CLOCK_XTALFREQ_16MHz
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#define CLOCK_CONFIG_LF_SRC             NRF_CLOCK_LF_SRC_Xtal
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#define CLOCK_CONFIG_LF_RC_CAL_INTERVAL RC_2000MS_CALIBRATION_INTERVAL
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#define CLOCK_CONFIG_IRQ_PRIORITY       APP_IRQ_PRIORITY_LOW
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/* GPIOTE */
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#define GPIOTE_ENABLED 1
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#if (GPIOTE_ENABLED == 1)
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#define GPIOTE_CONFIG_USE_SWI_EGU false
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#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
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#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 6
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#endif
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/* TIMER */
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#define TIMER0_ENABLED 0
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#if (TIMER0_ENABLED == 1)
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#define TIMER0_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
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#define TIMER0_CONFIG_MODE         TIMER_MODE_MODE_Timer
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#define TIMER0_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_32Bit
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#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define TIMER0_INSTANCE_INDEX      0
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#endif
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#define TIMER1_ENABLED 0
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#if (TIMER1_ENABLED == 1)
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#define TIMER1_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
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#define TIMER1_CONFIG_MODE         TIMER_MODE_MODE_Timer
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#define TIMER1_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
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#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define TIMER1_INSTANCE_INDEX      (TIMER0_ENABLED)
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#endif
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#define TIMER2_ENABLED 0
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#if (TIMER2_ENABLED == 1)
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#define TIMER2_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
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#define TIMER2_CONFIG_MODE         TIMER_MODE_MODE_Timer
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#define TIMER2_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
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#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define TIMER2_INSTANCE_INDEX      (TIMER1_ENABLED+TIMER0_ENABLED)
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#endif
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#define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED)
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/* RTC */
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#define RTC0_ENABLED 0
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#if (RTC0_ENABLED == 1)
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#define RTC0_CONFIG_FREQUENCY    32678
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#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define RTC0_CONFIG_RELIABLE     false
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#define RTC0_INSTANCE_INDEX      0
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#endif
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#define RTC1_ENABLED 0
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#if (RTC1_ENABLED == 1)
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#define RTC1_CONFIG_FREQUENCY    32768
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#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define RTC1_CONFIG_RELIABLE     false
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#define RTC1_INSTANCE_INDEX      (RTC0_ENABLED)
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#endif
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#define RTC_COUNT                (RTC0_ENABLED+RTC1_ENABLED)
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#define NRF_MAXIMUM_LATENCY_US 2000
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/* RNG */
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#define RNG_ENABLED 0
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#if (RNG_ENABLED == 1)
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#define RNG_CONFIG_ERROR_CORRECTION true
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#define RNG_CONFIG_POOL_SIZE        8
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#define RNG_CONFIG_IRQ_PRIORITY     APP_IRQ_PRIORITY_LOW
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#endif
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/* QDEC */
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#define QDEC_ENABLED 0
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#if (QDEC_ENABLED == 1)
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#define QDEC_CONFIG_REPORTPER    NRF_QDEC_REPORTPER_10
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#define QDEC_CONFIG_SAMPLEPER    NRF_QDEC_SAMPLEPER_16384us
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#define QDEC_CONFIG_PIO_A        1
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#define QDEC_CONFIG_PIO_B        2
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#define QDEC_CONFIG_PIO_LED      3
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#define QDEC_CONFIG_LEDPRE       511
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#define QDEC_CONFIG_LEDPOL       NRF_QDEC_LEPOL_ACTIVE_HIGH
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#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define QDEC_CONFIG_DBFEN        false
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#define QDEC_CONFIG_SAMPLE_INTEN false
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#endif
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/* LPCOMP */
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#define LPCOMP_ENABLED 0
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#if (LPCOMP_ENABLED == 1)
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#define LPCOMP_CONFIG_REFERENCE    NRF_LPCOMP_REF_SUPPLY_FOUR_EIGHT
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#define LPCOMP_CONFIG_DETECTION    NRF_LPCOMP_DETECT_DOWN
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#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define LPCOMP_CONFIG_INPUT        NRF_LPCOMP_INPUT_0
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#endif
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/* WDT */
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#define WDT_ENABLED 0
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#if (WDT_ENABLED == 1)
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#define WDT_CONFIG_BEHAVIOUR     NRF_WDT_BEHAVIOUR_RUN_SLEEP
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#define WDT_CONFIG_RELOAD_VALUE  2000
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#define WDT_CONFIG_IRQ_PRIORITY  APP_IRQ_PRIORITY_HIGH
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#endif
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#endif // NRF_DRV_CONFIG_H