## ffmpeg / libavcodec / alpha / dsputil_alpha_asm.S @ 2d5e962b

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1 | bb7d4939 | Falk Hüffner | /* |
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2 | * Alpha optimized DSP utils |
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3 | * Copyright (c) 2002 Falk Hueffner <falk@debian.org> |
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4 | * |
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5 | * This program is free software; you can redistribute it and/or modify |
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6 | * it under the terms of the GNU General Public License as published by |
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7 | * the Free Software Foundation; either version 2 of the License, or |
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8 | * (at your option) any later version. |
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9 | * |
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10 | * This program is distributed in the hope that it will be useful, |
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11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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13 | * GNU General Public License for more details. |
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14 | * |
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15 | * You should have received a copy of the GNU General Public License |
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16 | * along with this program; if not, write to the Free Software |
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17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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18 | */ |
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19 | |||

20 | /* |
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21 | * These functions are scheduled for pca56. They should work |
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22 | * reasonably on ev6, though. |
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23 | */ |
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24 | |||

25 | #include "regdef.h" |
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26 | d13c54cd | Falk Hüffner | #ifdef HAVE_AV_CONFIG_H |

27 | #include "config.h" |
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28 | #endif |
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29 | bb7d4939 | Falk Hüffner | |

30 | /* Some nicer register names. */ |
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31 | #define ta t10 |
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32 | #define tb t11 |
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33 | #define tc t12 |
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34 | #define td AT |
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35 | /* Danger: these overlap with the argument list and the return value */ |
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36 | #define te a5 |
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37 | #define tf a4 |
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38 | #define tg a3 |
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39 | #define th v0 |
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40 | |||

41 | .set noat |
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42 | .set noreorder |
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43 | .arch pca56 |
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44 | .text |
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45 | |||

46 | /************************************************************************ |
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47 | 494e4092 | Falk Hüffner | * void put_pixels_axp_asm(uint8_t *block, const uint8_t *pixels, |

48 | * int line_size, int h) |
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49 | */ |
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50 | .align 6 |
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51 | .globl put_pixels_axp_asm |
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52 | .ent put_pixels_axp_asm |
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53 | put_pixels_axp_asm: |
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54 | .frame sp, 0, ra |
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55 | .prologue 0 |
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56 | |||

57 | #ifdef HAVE_GPROF |
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58 | lda AT, _mcount |
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59 | jsr AT, (AT), _mcount |
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60 | #endif |
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61 | |||

62 | and a1, 7, t0 |
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63 | beq t0, $aligned |
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64 | |||

65 | .align 4 |
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66 | $unaligned: |
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67 | ldq_u t0, 0(a1) |
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68 | ldq_u t1, 8(a1) |
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69 | addq a1, a2, a1 |
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70 | nop |
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71 | |||

72 | ldq_u t2, 0(a1) |
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73 | ldq_u t3, 8(a1) |
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74 | addq a1, a2, a1 |
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75 | nop |
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76 | |||

77 | ldq_u t4, 0(a1) |
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78 | ldq_u t5, 8(a1) |
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79 | addq a1, a2, a1 |
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80 | nop |
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81 | |||

82 | ldq_u t6, 0(a1) |
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83 | ldq_u t7, 8(a1) |
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84 | extql t0, a1, t0 |
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85 | addq a1, a2, a1 |
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86 | |||

87 | extqh t1, a1, t1 |
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88 | addq a0, a2, t8 |
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89 | extql t2, a1, t2 |
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90 | addq t8, a2, t9 |
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91 | |||

92 | extqh t3, a1, t3 |
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93 | addq t9, a2, ta |
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94 | extql t4, a1, t4 |
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95 | or t0, t1, t0 |
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96 | |||

97 | extqh t5, a1, t5 |
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98 | or t2, t3, t2 |
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99 | extql t6, a1, t6 |
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100 | or t4, t5, t4 |
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101 | |||

102 | extqh t7, a1, t7 |
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103 | or t6, t7, t6 |
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104 | stq t0, 0(a0) |
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105 | stq t2, 0(t8) |
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106 | |||

107 | stq t4, 0(t9) |
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108 | subq a3, 4, a3 |
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109 | stq t6, 0(ta) |
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110 | addq ta, a2, a0 |
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111 | |||

112 | bne a3, $unaligned |
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113 | ret |
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114 | |||

115 | .align 4 |
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116 | $aligned: |
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117 | ldq t0, 0(a1) |
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118 | addq a1, a2, a1 |
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119 | ldq t1, 0(a1) |
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120 | addq a1, a2, a1 |
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121 | |||

122 | ldq t2, 0(a1) |
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123 | addq a1, a2, a1 |
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124 | ldq t3, 0(a1) |
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125 | |||

126 | 60286c8a | Falk Hüffner | addq a0, a2, t4 |

127 | addq a1, a2, a1 |
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128 | addq t4, a2, t5 |
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129 | subq a3, 4, a3 |
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130 | 494e4092 | Falk Hüffner | |

131 | 60286c8a | Falk Hüffner | stq t0, 0(a0) |

132 | addq t5, a2, t6 |
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133 | stq t1, 0(t4) |
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134 | addq t6, a2, a0 |
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135 | 494e4092 | Falk Hüffner | |

136 | 60286c8a | Falk Hüffner | stq t2, 0(t5) |

137 | stq t3, 0(t6) |
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138 | |||

139 | bne a3, $aligned |
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140 | 494e4092 | Falk Hüffner | ret |

141 | .end put_pixels_axp_asm |
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142 | |||

143 | /************************************************************************ |
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144 | bb7d4939 | Falk Hüffner | * void put_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels, |

145 | * int line_size) |
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146 | */ |
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147 | .align 6 |
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148 | .globl put_pixels_clamped_mvi_asm |
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149 | .ent put_pixels_clamped_mvi_asm |
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150 | put_pixels_clamped_mvi_asm: |
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151 | .frame sp, 0, ra |
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152 | .prologue 0 |
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153 | |||

154 | d13c54cd | Falk Hüffner | #ifdef HAVE_GPROF |

155 | lda AT, _mcount |
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156 | jsr AT, (AT), _mcount |
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157 | #endif |
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158 | |||

159 | bb7d4939 | Falk Hüffner | lda t8, -1 |

160 | lda t9, 8 # loop counter |
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161 | zap t8, 0xaa, t8 # 00ff00ff00ff00ff |
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162 | |||

163 | .align 4 |
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164 | 1: ldq t0, 0(a0) |
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165 | ldq t1, 8(a0) |
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166 | ldq t2, 16(a0) |
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167 | ldq t3, 24(a0) |
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168 | |||

169 | maxsw4 t0, zero, t0 |
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170 | subq t9, 2, t9 |
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171 | maxsw4 t1, zero, t1 |
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172 | lda a0, 32(a0) |
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173 | |||

174 | maxsw4 t2, zero, t2 |
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175 | addq a1, a2, ta |
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176 | maxsw4 t3, zero, t3 |
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177 | minsw4 t0, t8, t0 |
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178 | |||

179 | minsw4 t1, t8, t1 |
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180 | minsw4 t2, t8, t2 |
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181 | minsw4 t3, t8, t3 |
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182 | pkwb t0, t0 |
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183 | |||

184 | pkwb t1, t1 |
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185 | pkwb t2, t2 |
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186 | pkwb t3, t3 |
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187 | stl t0, 0(a1) |
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188 | |||

189 | stl t1, 4(a1) |
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190 | addq ta, a2, a1 |
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191 | stl t2, 0(ta) |
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192 | stl t3, 4(ta) |
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193 | |||

194 | bne t9, 1b |
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195 | ret |
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196 | .end put_pixels_clamped_mvi_asm |
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197 | |||

198 | /************************************************************************ |
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199 | * void add_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels, |
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200 | * int line_size) |
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201 | */ |
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202 | .align 6 |
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203 | .globl add_pixels_clamped_mvi_asm |
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204 | .ent add_pixels_clamped_mvi_asm |
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205 | add_pixels_clamped_mvi_asm: |
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206 | .frame sp, 0, ra |
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207 | .prologue 0 |
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208 | |||

209 | d13c54cd | Falk Hüffner | #ifdef HAVE_GPROF |

210 | lda AT, _mcount |
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211 | jsr AT, (AT), _mcount |
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212 | #endif |
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213 | |||

214 | bb7d4939 | Falk Hüffner | lda t1, -1 |

215 | lda th, 8 |
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216 | zap t1, 0x33, tg |
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217 | nop |
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218 | |||

219 | srl tg, 1, t0 |
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220 | xor tg, t0, tg # 0x8000800080008000 |
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221 | zap t1, 0xaa, tf # 0x00ff00ff00ff00ff |
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222 | |||

223 | .align 4 |
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224 | 1: ldl t1, 0(a1) # pix0 (try to hit cache line soon) |
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225 | ldl t4, 4(a1) # pix1 |
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226 | addq a1, a2, te # pixels += line_size |
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227 | ldq t0, 0(a0) # shorts0 |
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228 | |||

229 | ldl t7, 0(te) # pix2 (try to hit cache line soon) |
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230 | ldl ta, 4(te) # pix3 |
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231 | ldq t3, 8(a0) # shorts1 |
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232 | ldq t6, 16(a0) # shorts2 |
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233 | |||

234 | ldq t9, 24(a0) # shorts3 |
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235 | unpkbw t1, t1 # 0 0 (quarter/op no.) |
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236 | and t0, tg, t2 # 0 1 |
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237 | unpkbw t4, t4 # 1 0 |
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238 | |||

239 | bic t0, tg, t0 # 0 2 |
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240 | unpkbw t7, t7 # 2 0 |
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241 | and t3, tg, t5 # 1 1 |
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242 | addq t0, t1, t0 # 0 3 |
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243 | |||

244 | xor t0, t2, t0 # 0 4 |
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245 | unpkbw ta, ta # 3 0 |
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246 | and t6, tg, t8 # 2 1 |
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247 | maxsw4 t0, zero, t0 # 0 5 |
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248 | |||

249 | bic t3, tg, t3 # 1 2 |
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250 | bic t6, tg, t6 # 2 2 |
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251 | minsw4 t0, tf, t0 # 0 6 |
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252 | addq t3, t4, t3 # 1 3 |
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253 | |||

254 | pkwb t0, t0 # 0 7 |
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255 | xor t3, t5, t3 # 1 4 |
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256 | maxsw4 t3, zero, t3 # 1 5 |
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257 | addq t6, t7, t6 # 2 3 |
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258 | |||

259 | xor t6, t8, t6 # 2 4 |
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260 | and t9, tg, tb # 3 1 |
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261 | minsw4 t3, tf, t3 # 1 6 |
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262 | bic t9, tg, t9 # 3 2 |
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263 | |||

264 | maxsw4 t6, zero, t6 # 2 5 |
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265 | addq t9, ta, t9 # 3 3 |
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266 | stl t0, 0(a1) # 0 8 |
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267 | minsw4 t6, tf, t6 # 2 6 |
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268 | |||

269 | xor t9, tb, t9 # 3 4 |
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270 | maxsw4 t9, zero, t9 # 3 5 |
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271 | lda a0, 32(a0) # block += 16; |
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272 | pkwb t3, t3 # 1 7 |
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273 | |||

274 | minsw4 t9, tf, t9 # 3 6 |
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275 | subq th, 2, th |
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276 | pkwb t6, t6 # 2 7 |
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277 | pkwb t9, t9 # 3 7 |
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278 | |||

279 | stl t3, 4(a1) # 1 8 |
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280 | addq te, a2, a1 # pixels += line_size |
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281 | stl t6, 0(te) # 2 8 |
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282 | stl t9, 4(te) # 3 8 |
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283 | |||

284 | bne th, 1b |
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285 | ret |
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286 | .end add_pixels_clamped_mvi_asm |