Revision 2dd2f716 libavcodec/x86/vp8dsp.asm
libavcodec/x86/vp8dsp.asm | ||
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142 | 142 |
filter_h6_shuf2: db 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9 |
143 | 143 |
filter_h6_shuf3: db 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11 |
144 | 144 |
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145 |
pw_20091: times 4 dw 20091 |
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146 |
pw_17734: times 4 dw 17734 |
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147 |
|
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145 | 148 |
cextern pw_3 |
146 | 149 |
cextern pw_4 |
147 | 150 |
cextern pw_64 |
... | ... | |
924 | 927 |
RET |
925 | 928 |
|
926 | 929 |
;----------------------------------------------------------------------------- |
930 |
; void vp8_idct_add_<opt>(uint8_t *dst, DCTELEM block[16], int stride); |
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931 |
;----------------------------------------------------------------------------- |
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932 |
|
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933 |
; calculate %1=%2+%1; %2=%2-%1, with %3=temp register |
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934 |
%macro SUMSUB 3 |
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935 |
mova %3, %1 |
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936 |
paddw %1, %2 |
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937 |
psubw %2, %3 |
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938 |
%endmacro |
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939 |
|
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940 |
; calculate %1=mul_35468(%1)-mul_20091(%2); %2=mul_20091(%1)+mul_35468(%2) |
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941 |
; this macro assumes that m6/m7 have words for 20091/17734 loaded |
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942 |
%macro VP8_MULTIPLY_SUMSUB 4 |
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943 |
mova %3, %1 |
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944 |
mova %4, %2 |
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945 |
pmulhw %3, m6 ;20091(1) |
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946 |
pmulhw %4, m6 ;20091(2) |
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947 |
paddw %3, %1 |
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948 |
paddw %4, %2 |
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949 |
psllw %1, 1 |
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950 |
psllw %2, 1 |
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951 |
pmulhw %1, m7 ;35468(1) |
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952 |
pmulhw %2, m7 ;35468(2) |
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953 |
psubw %1, %4 |
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954 |
paddw %2, %3 |
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955 |
%endmacro |
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956 |
|
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957 |
; calculate x0=%1+%3; x1=%1-%3 |
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958 |
; x2=mul_35468(%2)-mul_20091(%4); x3=mul_20091(%2)+mul_35468(%4) |
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959 |
; %1=x0+x3 (tmp0); %2=x1+x2 (tmp1); %3=x1-x2 (tmp2); %4=x0-x3 (tmp3) |
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960 |
; %5/%6 are temporary registers |
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961 |
; we assume m6/m7 have constant words 20091/17734 loaded in them |
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962 |
%macro VP8_IDCT_TRANSFORM4x4_1D 6 |
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963 |
SUMSUB_BA m%3, m%1, m%5 ;t0, t1 |
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964 |
VP8_MULTIPLY_SUMSUB m%2, m%4, m%5,m%6 ;t2, t3 |
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965 |
SUMSUB_BA m%4, m%3, m%5 ;tmp0, tmp3 |
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966 |
SUMSUB_BA m%2, m%1, m%5 ;tmp1, tmp2 |
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967 |
SWAP %4, %1 |
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968 |
SWAP %4, %3 |
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969 |
%endmacro |
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970 |
|
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971 |
; transpose a 4x4 table |
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972 |
%macro TRANSPOSE4x4 5 ; output in %1/%4/%5/%3 |
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973 |
mova m%5, m%1 |
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974 |
punpcklwd m%1, m%2 |
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975 |
punpckhwd m%5, m%2 |
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976 |
mova m%2, m%3 |
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977 |
punpcklwd m%3, m%4 |
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978 |
punpckhwd m%2, m%4 |
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979 |
mova m%4, m%1 |
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980 |
punpckldq m%1, m%3 ;col0 |
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981 |
punpckhdq m%4, m%3 ;col1 |
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982 |
mova m%3, m%5 |
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983 |
punpckldq m%5, m%2 ;col2 |
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984 |
punpckhdq m%3, m%2 ;col3 |
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985 |
SWAP %4, %2 |
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986 |
SWAP %4, %5 |
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987 |
SWAP %4, %3 |
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988 |
%endmacro |
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989 |
|
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990 |
INIT_MMX |
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991 |
cglobal vp8_idct_add_mmx, 3, 3 |
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992 |
; load block data |
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993 |
movq m0, [r1] |
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994 |
movq m1, [r1+8] |
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995 |
movq m2, [r1+16] |
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996 |
movq m3, [r1+24] |
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997 |
movq m6, [pw_20091] |
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998 |
movq m7, [pw_17734] |
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999 |
|
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1000 |
; actual IDCT |
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1001 |
VP8_IDCT_TRANSFORM4x4_1D 0, 1, 2, 3, 4, 5 |
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1002 |
TRANSPOSE4x4W 0, 1, 2, 3, 4 |
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1003 |
paddw m0, [pw_4] |
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1004 |
VP8_IDCT_TRANSFORM4x4_1D 0, 1, 2, 3, 4, 5 |
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1005 |
TRANSPOSE4x4W 0, 1, 2, 3, 4 |
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1006 |
|
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1007 |
; store |
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1008 |
pxor m4, m4 |
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1009 |
lea r1, [r0+2*r2] |
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1010 |
STORE_DIFFx2 m0, m1, m6, m7, m4, 3, r0, r2 |
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1011 |
STORE_DIFFx2 m2, m3, m6, m7, m4, 3, r1, r2 |
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1012 |
|
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1013 |
RET |
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1014 |
|
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1015 |
;----------------------------------------------------------------------------- |
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927 | 1016 |
; void vp8_luma_dc_wht_mmxext(DCTELEM block[4][4][16], DCTELEM dc[16]) |
928 | 1017 |
;----------------------------------------------------------------------------- |
929 | 1018 |
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