Revision 40d0e665 libavcodec/i386/dsputil_mmx.c

View differences:

libavcodec/i386/dsputil_mmx.c
240 240
                "movq   %%mm2, (%0, %1)         \n\t"
241 241
                "movq   %%mm4, (%0, %1, 2)      \n\t"
242 242
                "movq   %%mm6, (%0, %2)         \n\t"
243
                ::"r" (pix), "r" ((long)line_size), "r" ((long)line_size*3), "m"(*p)
243
                ::"r" (pix), "r" ((x86_reg)line_size), "r" ((x86_reg)line_size*3), "m"(*p)
244 244
                :"memory");
245 245
        pix += line_size*4;
246 246
        p += 32;
......
265 265
            "movq       %%mm2, (%0, %1)         \n\t"
266 266
            "movq       %%mm4, (%0, %1, 2)      \n\t"
267 267
            "movq       %%mm6, (%0, %2)         \n\t"
268
            ::"r" (pix), "r" ((long)line_size), "r" ((long)line_size*3), "r"(p)
268
            ::"r" (pix), "r" ((x86_reg)line_size), "r" ((x86_reg)line_size*3), "r"(p)
269 269
            :"memory");
270 270
}
271 271

  
......
349 349
         "subl $4, %0                   \n\t"
350 350
         "jnz 1b                        \n\t"
351 351
         : "+g"(h), "+r" (pixels),  "+r" (block)
352
         : "r"((long)line_size)
352
         : "r"((x86_reg)line_size)
353 353
         : "%"REG_a, "memory"
354 354
        );
355 355
}
......
375 375
         "subl $4, %0                   \n\t"
376 376
         "jnz 1b                        \n\t"
377 377
         : "+g"(h), "+r" (pixels),  "+r" (block)
378
         : "r"((long)line_size)
378
         : "r"((x86_reg)line_size)
379 379
         : "%"REG_a, "memory"
380 380
        );
381 381
}
......
409 409
         "subl $4, %0                   \n\t"
410 410
         "jnz 1b                        \n\t"
411 411
         : "+g"(h), "+r" (pixels),  "+r" (block)
412
         : "r"((long)line_size)
412
         : "r"((x86_reg)line_size)
413 413
         : "%"REG_a, "memory"
414 414
        );
415 415
}
......
431 431
         "lea (%2,%3,4), %2             \n\t"
432 432
         "jnz 1b                        \n\t"
433 433
         : "+g"(h), "+r" (pixels),  "+r" (block)
434
         : "r"((long)line_size), "r"(3L*line_size)
434
         : "r"((x86_reg)line_size), "r"((x86_reg)3L*line_size)
435 435
         : "memory"
436 436
        );
437 437
}
......
457 457
         "lea (%2,%3,4), %2             \n\t"
458 458
         "jnz 1b                        \n\t"
459 459
         : "+g"(h), "+r" (pixels),  "+r" (block)
460
         : "r"((long)line_size), "r"(3L*line_size)
460
         : "r"((x86_reg)line_size), "r"((x86_reg)3L*line_size)
461 461
         : "memory"
462 462
        );
463 463
}
......
480 480
}
481 481

  
482 482
static void add_bytes_mmx(uint8_t *dst, uint8_t *src, int w){
483
    long i=0;
483
    x86_reg i=0;
484 484
    asm volatile(
485 485
        "1:                             \n\t"
486 486
        "movq  (%1, %0), %%mm0          \n\t"
......
495 495
        "cmp %3, %0                     \n\t"
496 496
        " jb 1b                         \n\t"
497 497
        : "+r" (i)
498
        : "r"(src), "r"(dst), "r"((long)w-15)
498
        : "r"(src), "r"(dst), "r"((x86_reg)w-15)
499 499
    );
500 500
    for(; i<w; i++)
501 501
        dst[i+0] += src[i+0];
502 502
}
503 503

  
504 504
static void add_bytes_l2_mmx(uint8_t *dst, uint8_t *src1, uint8_t *src2, int w){
505
    long i=0;
505
    x86_reg i=0;
506 506
    asm volatile(
507 507
        "1:                             \n\t"
508 508
        "movq   (%2, %0), %%mm0         \n\t"
......
515 515
        "cmp %4, %0                     \n\t"
516 516
        " jb 1b                         \n\t"
517 517
        : "+r" (i)
518
        : "r"(dst), "r"(src1), "r"(src2), "r"((long)w-15)
518
        : "r"(dst), "r"(src1), "r"(src2), "r"((x86_reg)w-15)
519 519
    );
520 520
    for(; i<w; i++)
521 521
        dst[i] = src1[i] + src2[i];
......
689 689
        "movd %%mm6, (%1,%3)            \n\t"
690 690
        :: "r" (src),
691 691
           "r" (src + 4*stride),
692
           "r" ((long)   stride ),
693
           "r" ((long)(3*stride))
692
           "r" ((x86_reg)   stride ),
693
           "r" ((x86_reg)(3*stride))
694 694
    );
695 695
    }
696 696
}
......
723 723
                "cmp %3, %0                     \n\t"
724 724
                " jb 1b                         \n\t"
725 725
                : "+r" (ptr)
726
                : "r" ((long)wrap), "r" ((long)width), "r" (ptr + wrap*height)
726
                : "r" ((x86_reg)wrap), "r" ((x86_reg)width), "r" (ptr + wrap*height)
727 727
        );
728 728
    }
729 729
    else
......
746 746
                "cmp %3, %0                     \n\t"
747 747
                " jb 1b                         \n\t"
748 748
                : "+r" (ptr)
749
                : "r" ((long)wrap), "r" ((long)width), "r" (ptr + wrap*height)
749
                : "r" ((x86_reg)wrap), "r" ((x86_reg)width), "r" (ptr + wrap*height)
750 750
        );
751 751
    }
752 752

  
......
764 764
                "cmp %4, %0                     \n\t"
765 765
                " jb 1b                         \n\t"
766 766
                : "+r" (ptr)
767
                : "r" ((long)buf - (long)ptr - w), "r" ((long)-wrap), "r" ((long)-wrap*3), "r" (ptr+width+2*w)
767
                : "r" ((x86_reg)buf - (x86_reg)ptr - w), "r" ((x86_reg)-wrap), "r" ((x86_reg)-wrap*3), "r" (ptr+width+2*w)
768 768
        );
769 769
        ptr= last_line + (i + 1) * wrap - w;
770 770
        asm volatile(
......
778 778
                "cmp %4, %0                     \n\t"
779 779
                " jb 1b                         \n\t"
780 780
                : "+r" (ptr)
781
                : "r" ((long)last_line - (long)ptr - w), "r" ((long)wrap), "r" ((long)wrap*3), "r" (ptr+width+2*w)
781
                : "r" ((x86_reg)last_line - (x86_reg)ptr - w), "r" ((x86_reg)wrap), "r" ((x86_reg)wrap*3), "r" (ptr+width+2*w)
782 782
        );
783 783
    }
784 784
}
......
786 786
#define PAETH(cpu, abs3)\
787 787
void add_png_paeth_prediction_##cpu(uint8_t *dst, uint8_t *src, uint8_t *top, int w, int bpp)\
788 788
{\
789
    long i = -bpp;\
790
    long end = w-3;\
789
    x86_reg i = -bpp;\
790
    x86_reg end = w-3;\
791 791
    asm volatile(\
792 792
        "pxor      %%mm7, %%mm7 \n"\
793 793
        "movd    (%1,%0), %%mm0 \n"\
......
830 830
        "cmp       %5, %0 \n"\
831 831
        "jle 1b \n"\
832 832
        :"+r"(i)\
833
        :"r"(dst), "r"(top), "r"(src), "r"((long)bpp), "g"(end),\
833
        :"r"(dst), "r"(top), "r"(src), "r"((x86_reg)bpp), "g"(end),\
834 834
         "m"(ff_pw_255)\
835 835
        :"memory"\
836 836
    );\
......
994 994
        "decl %2                          \n\t"\
995 995
        " jnz 1b                          \n\t"\
996 996
        : "+a"(src), "+c"(dst), "+D"(h)\
997
        : "d"((long)srcStride), "S"((long)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(temp), "m"(ROUNDER)\
997
        : "d"((x86_reg)srcStride), "S"((x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(temp), "m"(ROUNDER)\
998 998
        : "memory"\
999 999
    );\
1000 1000
}\
......
1105 1105
        "decl %2                          \n\t"\
1106 1106
        " jnz 1b                          \n\t"\
1107 1107
        : "+a"(src), "+c"(dst), "+d"(h)\
1108
        : "S"((long)srcStride), "D"((long)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER)\
1108
        : "S"((x86_reg)srcStride), "D"((x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER)\
1109 1109
        : "memory"\
1110 1110
    );\
1111 1111
}\
......
1169 1169
        "decl %2                        \n\t"\
1170 1170
        " jnz 1b                        \n\t"\
1171 1171
        : "+r" (src), "+r" (temp_ptr), "+r"(count)\
1172
        : "r" ((long)srcStride)\
1172
        : "r" ((x86_reg)srcStride)\
1173 1173
        : "memory"\
1174 1174
    );\
1175 1175
    \
......
1216 1216
        " jnz 1b                        \n\t"\
1217 1217
        \
1218 1218
        : "+r"(temp_ptr), "+r"(dst), "+g"(count)\
1219
        : "r"((long)dstStride), "r"(2*(long)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER), "g"(4-14*(long)dstStride)\
1219
        : "r"((x86_reg)dstStride), "r"(2*(x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER), "g"(4-14*(x86_reg)dstStride)\
1220 1220
        :"memory"\
1221 1221
    );\
1222 1222
}\
......
1241 1241
        "decl %2                        \n\t"\
1242 1242
        " jnz 1b                        \n\t"\
1243 1243
        : "+r" (src), "+r" (temp_ptr), "+r"(count)\
1244
        : "r" ((long)srcStride)\
1244
        : "r" ((x86_reg)srcStride)\
1245 1245
        : "memory"\
1246 1246
    );\
1247 1247
    \
......
1276 1276
        " jnz 1b                        \n\t"\
1277 1277
         \
1278 1278
        : "+r"(temp_ptr), "+r"(dst), "+g"(count)\
1279
        : "r"((long)dstStride), "r"(2*(long)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER), "g"(4-6*(long)dstStride)\
1279
        : "r"((x86_reg)dstStride), "r"(2*(x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER), "g"(4-6*(x86_reg)dstStride)\
1280 1280
        : "memory"\
1281 1281
   );\
1282 1282
}\
......
1839 1839
}
1840 1840

  
1841 1841
static void vector_fmul_3dnow(float *dst, const float *src, int len){
1842
    long i = (len-4)*4;
1842
    x86_reg i = (len-4)*4;
1843 1843
    asm volatile(
1844 1844
        "1: \n\t"
1845 1845
        "movq    (%1,%0), %%mm0 \n\t"
......
1857 1857
    );
1858 1858
}
1859 1859
static void vector_fmul_sse(float *dst, const float *src, int len){
1860
    long i = (len-8)*4;
1860
    x86_reg i = (len-8)*4;
1861 1861
    asm volatile(
1862 1862
        "1: \n\t"
1863 1863
        "movaps    (%1,%0), %%xmm0 \n\t"
......
1875 1875
}
1876 1876

  
1877 1877
static void vector_fmul_reverse_3dnow2(float *dst, const float *src0, const float *src1, int len){
1878
    long i = len*4-16;
1878
    x86_reg i = len*4-16;
1879 1879
    asm volatile(
1880 1880
        "1: \n\t"
1881 1881
        "pswapd   8(%1), %%mm0 \n\t"
......
1893 1893
    asm volatile("femms");
1894 1894
}
1895 1895
static void vector_fmul_reverse_sse(float *dst, const float *src0, const float *src1, int len){
1896
    long i = len*4-32;
1896
    x86_reg i = len*4-32;
1897 1897
    asm volatile(
1898 1898
        "1: \n\t"
1899 1899
        "movaps        16(%1), %%xmm0 \n\t"
......
1914 1914

  
1915 1915
static void vector_fmul_add_add_3dnow(float *dst, const float *src0, const float *src1,
1916 1916
                                      const float *src2, int src3, int len, int step){
1917
    long i = (len-4)*4;
1917
    x86_reg i = (len-4)*4;
1918 1918
    if(step == 2 && src3 == 0){
1919 1919
        dst += (len-4)*2;
1920 1920
        asm volatile(
......
1963 1963
}
1964 1964
static void vector_fmul_add_add_sse(float *dst, const float *src0, const float *src1,
1965 1965
                                    const float *src2, int src3, int len, int step){
1966
    long i = (len-8)*4;
1966
    x86_reg i = (len-8)*4;
1967 1967
    if(step == 2 && src3 == 0){
1968 1968
        dst += (len-8)*2;
1969 1969
        asm volatile(

Also available in: Unified diff