Revision 40d0e665 libavcodec/i386/snowdsp_mmx.c

View differences:

libavcodec/i386/snowdsp_mmx.c
73 73
        IDWTELEM * const dst = b+w2;
74 74

  
75 75
        i = 0;
76
        for(; (((long)&dst[i]) & 0x1F) && i<w_r; i++){
76
        for(; (((x86_reg)&dst[i]) & 0x1F) && i<w_r; i++){
77 77
            dst[i] = dst[i] - (b[i] + b[i + 1]);
78 78
        }
79 79
        for(; i<w_r-15; i+=16){
......
146 146
        IDWTELEM * const src = b+w2;
147 147

  
148 148
        i = 0;
149
        for(; (((long)&temp[i]) & 0x1F) && i<w_r; i++){
149
        for(; (((x86_reg)&temp[i]) & 0x1F) && i<w_r; i++){
150 150
            temp[i] = src[i] - ((-W_AM*(b[i] + b[i+1]))>>W_AS);
151 151
        }
152 152
        for(; i<w_r-7; i+=8){
......
436 436
        "movdqa %%"s3", %%"t3" \n\t"
437 437

  
438 438
void ff_snow_vertical_compose97i_sse2(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width){
439
    long i = width;
439
    x86_reg i = width;
440 440

  
441 441
    while(i & 0x1F)
442 442
    {
......
534 534

  
535 535

  
536 536
void ff_snow_vertical_compose97i_mmx(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width){
537
    long i = width;
537
    x86_reg i = width;
538 538
    while(i & 15)
539 539
    {
540 540
        i--;
......
605 605

  
606 606
#define snow_inner_add_yblock_sse2_header \
607 607
    IDWTELEM * * dst_array = sb->line + src_y;\
608
    long tmp;\
608
    x86_reg tmp;\
609 609
    asm volatile(\
610 610
             "mov  %7, %%"REG_c"             \n\t"\
611 611
             "mov  %6, %2                    \n\t"\
......
667 667
             "jnz 1b                         \n\t"\
668 668
             :"+m"(dst8),"+m"(dst_array),"=&r"(tmp)\
669 669
             :\
670
             "rm"((long)(src_x<<1)),"m"(obmc),"a"(block),"m"((long)b_h),"m"((long)src_stride):\
670
             "rm"((x86_reg)(src_x<<1)),"m"(obmc),"a"(block),"m"((x86_reg)b_h),"m"((x86_reg)src_stride):\
671 671
             "%"REG_c"","%"REG_S"","%"REG_D"","%"REG_d"");
672 672

  
673 673
#define snow_inner_add_yblock_sse2_end_8\
......
684 684
             "dec %2                         \n\t"\
685 685
             snow_inner_add_yblock_sse2_end_common2
686 686

  
687
static void inner_add_yblock_bw_8_obmc_16_bh_even_sse2(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h,
688
                      int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){
687
static void inner_add_yblock_bw_8_obmc_16_bh_even_sse2(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h,
688
                      int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){
689 689
snow_inner_add_yblock_sse2_header
690 690
snow_inner_add_yblock_sse2_start_8("xmm1", "xmm5", "3", "0")
691 691
snow_inner_add_yblock_sse2_accum_8("2", "8")
......
732 732
snow_inner_add_yblock_sse2_end_8
733 733
}
734 734

  
735
static void inner_add_yblock_bw_16_obmc_32_sse2(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h,
736
                      int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){
735
static void inner_add_yblock_bw_16_obmc_32_sse2(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h,
736
                      int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){
737 737
snow_inner_add_yblock_sse2_header
738 738
snow_inner_add_yblock_sse2_start_16("xmm1", "xmm5", "3", "0")
739 739
snow_inner_add_yblock_sse2_accum_16("2", "16")
......
758 758

  
759 759
#define snow_inner_add_yblock_mmx_header \
760 760
    IDWTELEM * * dst_array = sb->line + src_y;\
761
    long tmp;\
761
    x86_reg tmp;\
762 762
    asm volatile(\
763 763
             "mov  %7, %%"REG_c"             \n\t"\
764 764
             "mov  %6, %2                    \n\t"\
......
815 815
             "jnz 1b                         \n\t"\
816 816
             :"+m"(dst8),"+m"(dst_array),"=&r"(tmp)\
817 817
             :\
818
             "rm"((long)(src_x<<1)),"m"(obmc),"a"(block),"m"((long)b_h),"m"((long)src_stride):\
818
             "rm"((x86_reg)(src_x<<1)),"m"(obmc),"a"(block),"m"((x86_reg)b_h),"m"((x86_reg)src_stride):\
819 819
             "%"REG_c"","%"REG_S"","%"REG_D"","%"REG_d"");
820 820

  
821
static void inner_add_yblock_bw_8_obmc_16_mmx(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h,
822
                      int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){
821
static void inner_add_yblock_bw_8_obmc_16_mmx(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h,
822
                      int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){
823 823
snow_inner_add_yblock_mmx_header
824 824
snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "0", "0")
825 825
snow_inner_add_yblock_mmx_accum("2", "8", "0")
......
829 829
snow_inner_add_yblock_mmx_end("16")
830 830
}
831 831

  
832
static void inner_add_yblock_bw_16_obmc_32_mmx(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h,
833
                      int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){
832
static void inner_add_yblock_bw_16_obmc_32_mmx(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h,
833
                      int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){
834 834
snow_inner_add_yblock_mmx_header
835 835
snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "0", "0")
836 836
snow_inner_add_yblock_mmx_accum("2", "16", "0")

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