ffmpeg / libavcodec / ps2 / idct_mmi.c @ 5cf08f23
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/*


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Originally provided by Intel at AP922

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http://developer.intel.com/vtune/cbts/strmsimd/922down.htm

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(See more app notes at http://developer.intel.com/vtune/cbts/strmsimd/appnotes.htm)

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but in a limited edition.

6 

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column code adapted from peter gubanov

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Copyright (c) 20002001 Peter Gubanov <peter@elecard.net.ru>

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http://www.elecard.com/peter/idct.shtml

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Rounding trick Copyright (c) 2000 Michel Lespinasse <walken@zoy.org>

11 

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MMI port by Leon van Stuivenberg

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*/

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#include "../common.h" 
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#include "../dsputil.h" 
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#include "mmi.h" 
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#define BITS_INV_ACC 5 // 4 or 5 for IEEE 
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#define SHIFT_INV_ROW (16  BITS_INV_ACC) 
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#define SHIFT_INV_COL (1 + BITS_INV_ACC) 
21  
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#define TG1 6518 
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#define TG2 13573 
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#define TG3 21895 
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#define CS4 23170 
26  
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#define ROUNDER_0 0 
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#define ROUNDER_1 16 
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#define TAB_i_04 (32+0) 
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#define TAB_i_17 (32+64) 
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#define TAB_i_26 (32+128) 
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#define TAB_i_35 (32+192) 
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#define TG_1_16 (32+256+0) 
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#define TG_2_16 (32+256+16) 
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#define TG_3_16 (32+256+32) 
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#define COS_4_16 (32+256+48) 
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#define CLIPMAX (32+256+64+0) 
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static short consttable[] align16 = { 
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/* rounder 0*/ // assume SHIFT_INV_ROW == 11 
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0x3ff, 1, 0x3ff, 1, 0x3ff, 1, 0x3ff, 1, 
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/* rounder 1*/

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0x3ff, 0, 0x3ff, 0, 0x3ff, 0, 0x3ff, 0, 
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/* row 0/4*/

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16384, 21407, 16384, 21407, 22725, 19266, 22725, 12873, 
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8867, 16384, 8867, 16384, 4520, 12873, 4520, 19266, 
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16384, 8867, 16384, 8867, 12873, 22725, 19266, 22725, 
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21407, 16384, 21407, 16384, 19266, 4520, 12873, 4520, 
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/* row 1/7*/

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22725, 29692, 22725, 29692, 31521, 26722, 31521, 17855, 
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12299, 22725, 12299, 22725, 6270, 17855, 6270, 26722, 
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22725, 12299, 22725, 12299, 17855, 31521, 26722, 31521, 
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29692, 22725, 29692, 22725, 26722, 6270, 17855, 6270, 
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/* row 2/6*/

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21407, 27969, 21407, 27969, 29692, 25172, 29692, 16819, 
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11585, 21407, 11585, 21407, 5906, 16819, 5906, 25172, 
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21407, 11585, 21407, 11585, 16819, 29692, 25172, 29692, 
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27969, 21407, 27969, 21407, 25172, 5906, 16819, 5906, 
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/*row 3/5*/

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19266, 25172, 19266, 25172, 26722, 22654, 26722, 15137, 
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10426, 19266, 10426, 19266, 5315, 15137, 5315, 22654, 
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19266, 10426, 19266, 10426, 15137, 26722, 22654, 26722, 
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25172, 19266, 25172, 19266, 22654, 5315, 15137, 5315, 
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/*column constants*/

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TG1, TG1, TG1, TG1, TG1, TG1, TG1, TG1, 
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TG2, TG2, TG2, TG2, TG2, TG2, TG2, TG2, 
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TG3, TG3, TG3, TG3, TG3, TG3, TG3, TG3, 
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CS4, CS4, CS4, CS4, CS4, CS4, CS4, CS4, 
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/* clamp */

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255, 255, 255, 255, 255, 255, 255, 255 
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}; 
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#define DCT_8_INV_ROW1(blk, rowoff, taboff, rnd, outreg) { \

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lq(blk, rowoff, $16); /* r16 = x7 x5 x3 x1 x6 x4 x2 x0 */ \ 
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/*slot*/ \

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lq($24, 0+taboff, $17); /* r17 = w */ \ 
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/*delay slot $16*/ \

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lq($24, 16+taboff, $18);/* r18 = w */ \ 
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prevh($16, $2); /* r2 = x1 x3 x5 x7 x0 x2 x4 x6 */ \ 
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lq($24, 32+taboff, $19);/* r19 = w */ \ 
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phmadh($17, $16, $17); /* r17 = b1"b0'a1"a0' */ \ 
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lq($24, 48+taboff, $20);/* r20 = w */ \ 
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phmadh($18, $2, $18); /* r18 = b1'b0"a1'a0" */ \ 
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phmadh($19, $16, $19); /* r19 = b3"b2'a3"a2' */ \ 
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phmadh($20, $2, $20); /* r20 = b3'b2"a3'a2" */ \ 
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paddw($17, $18, $17); /* r17 = (b1)(b0)(a1)(a0) */ \ 
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paddw($19, $20, $19); /* r19 = (b3)(b2)(a3)(a2) */ \ 
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pcpyld($19, $17, $18); /* r18 = (a3)(a2)(a1)(a0) */ \ 
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pcpyud($17, $19, $20); /* r20 = (b3)(b2)(b1)(b0) */ \ 
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paddw($18, rnd, $18); /* r18 = (a3)(a2)(a1)(a0) */\ 
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paddw($18, $20, $17); /* r17 = ()()()(a0+b0) */ \ 
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psubw($18, $20, $20); /* r20 = ()()()(a0b0) */ \ 
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psraw($17, SHIFT_INV_ROW, $17); /* r17 = (y3 y2 y1 y0) */ \ 
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psraw($20, SHIFT_INV_ROW, $20); /* r20 = (y4 y5 y6 y7) */ \ 
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ppach($20, $17, outreg);/* out = y4 y5 y6 y7 y3 y2 y1 y0 Note order */ \ 
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\ 
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prevh(outreg, $2); \

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pcpyud($2, $2, $2); \ 
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pcpyld($2, outreg, outreg); \

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} 
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#define DCT_8_INV_COL8() \

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\ 
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lq($24, TG_3_16, $2); /* r2 = tn3 */ \ 
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\ 
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pmulth($11, $2, $17); /* r17 = x3 * tn3 (6420) */ \ 
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psraw($17, 15, $17); \ 
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pmfhl_uw($3); /* r3 = 7531 */ \ 
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psraw($3, 15, $3); \ 
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pinteh($3, $17, $17); /* r17 = x3 * tn3 */ \ 
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psubh($17, $13, $17); /* r17 = tm35 */ \ 
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\ 
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pmulth($13, $2, $18); /* r18 = x5 * tn3 (6420) */ \ 
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psraw($18, 15, $18); \ 
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pmfhl_uw($3); /* r3 = 7531 */ \ 
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psraw($3, 15, $3); \ 
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pinteh($3, $18, $18); /* r18 = x5 * tn3 */ \ 
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paddh($18, $11, $18); /* r18 = tp35 */ \ 
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\ 
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lq($24, TG_1_16, $2); /* r2 = tn1 */ \ 
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\ 
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pmulth($15, $2, $19); /* r19 = x7 * tn1 (6420) */ \ 
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psraw($19, 15, $19); \ 
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pmfhl_uw($3); /* r3 = 7531 */ \ 
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psraw($3, 15, $3); \ 
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pinteh($3, $19, $19); /* r19 = x7 * tn1 */ \ 
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paddh($19, $9, $19); /* r19 = tp17 */ \ 
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\ 
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pmulth($9, $2, $20); /* r20 = x1 * tn1 (6420) */ \ 
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psraw($20, 15, $20); \ 
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pmfhl_uw($3); /* r3 = 7531 */ \ 
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psraw($3, 15, $3); \ 
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pinteh($3, $20, $20); /* r20 = x1 * tn1 */ \ 
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psubh($20, $15, $20); /* r20 = tm17 */ \ 
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\ 
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psubh($19, $18, $3); /* r3 = t1 */ \ 
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paddh($20, $17, $16); /* r16 = t2 */ \ 
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psubh($20, $17, $23); /* r23 = b3 */ \ 
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paddh($19, $18, $20); /* r20 = b0 */ \ 
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\ 
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lq($24, COS_4_16, $2); /* r2 = cs4 */ \ 
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\ 
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paddh($3, $16, $21); /* r21 = t1+t2 */ \ 
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psubh($3, $16, $22); /* r22 = t1t2 */ \ 
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\ 
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pmulth($21, $2, $21); /* r21 = cs4 * (t1+t2) 6420 */ \ 
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psraw($21, 15, $21); \ 
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pmfhl_uw($3); /* r3 = 7531 */ \ 
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psraw($3, 15, $3); \ 
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pinteh($3, $21, $21); /* r21 = b1 */ \ 
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\ 
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pmulth($22, $2, $22); /* r22 = cs4 * (t1t2) 6420 */ \ 
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psraw($22, 15, $22); \ 
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pmfhl_uw($3); /* r3 = 7531 */ \ 
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psraw($3, 15, $3); \ 
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pinteh($3, $22, $22); /* r22 = b2 */ \ 
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\ 
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lq($24, TG_2_16, $2); /* r2 = tn2 */ \ 
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\ 
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pmulth($10, $2, $17); /* r17 = x2 * tn2 (6420) */ \ 
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psraw($17, 15, $17); \ 
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pmfhl_uw($3); /* r3 = 7531 */ \ 
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psraw($3, 15, $3); \ 
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pinteh($3, $17, $17); /* r17 = x3 * tn3 */ \ 
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psubh($17, $14, $17); /* r17 = tm26 */ \ 
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\ 
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pmulth($14, $2, $18); /* r18 = x6 * tn2 (6420) */ \ 
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psraw($18, 15, $18); \ 
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pmfhl_uw($3); /* r3 = 7531 */ \ 
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psraw($3, 15, $3); \ 
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pinteh($3, $18, $18); /* r18 = x6 * tn2 */ \ 
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paddh($18, $10, $18); /* r18 = tp26 */ \ 
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\ 
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paddh($8, $12, $2); /* r2 = tp04 */ \ 
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psubh($8, $12, $3); /* r3 = tm04 */ \ 
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\ 
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paddh($2, $18, $16); /* r16 = a0 */ \ 
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psubh($2, $18, $19); /* r19 = a3 */ \ 
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psubh($3, $17, $18); /* r18 = a2 */ \ 
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paddh($3, $17, $17); /* r17 = a1 */ 
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#define DCT_8_INV_COL8_STORE(blk) \

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\ 
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paddh($16, $20, $2); /* y0 a0+b0 */ \ 
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psubh($16, $20, $16); /* y7 a0b0 */ \ 
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psrah($2, SHIFT_INV_COL, $2); \ 
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psrah($16, SHIFT_INV_COL, $16); \ 
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sq($2, 0, blk); \ 
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sq($16, 112, blk); \ 
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\ 
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paddh($17, $21, $3); /* y1 a1+b1 */ \ 
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psubh($17, $21, $17); /* y6 a1b1 */ \ 
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psrah($3, SHIFT_INV_COL, $3); \ 
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psrah($17, SHIFT_INV_COL, $17); \ 
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sq($3, 16, blk); \ 
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sq($17, 96, blk); \ 
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\ 
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paddh($18, $22, $2); /* y2 a2+b2 */ \ 
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psubh($18, $22, $18); /* y5 a2b2 */ \ 
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psrah($2, SHIFT_INV_COL, $2); \ 
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psrah($18, SHIFT_INV_COL, $18); \ 
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sq($2, 32, blk); \ 
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sq($18, 80, blk); \ 
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\ 
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paddh($19, $23, $3); /* y3 a3+b3 */ \ 
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psubh($19, $23, $19); /* y4 a3b3 */ \ 
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psrah($3, SHIFT_INV_COL, $3); \ 
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psrah($19, SHIFT_INV_COL, $19); \ 
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sq($3, 48, blk); \ 
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sq($19, 64, blk); 
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#define DCT_8_INV_COL8_PMS() \

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paddh($16, $20, $2); /* y0 a0+b0 */ \ 
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psubh($16, $20, $20); /* y7 a0b0 */ \ 
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psrah($2, SHIFT_INV_COL, $16); \ 
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psrah($20, SHIFT_INV_COL, $20); \ 
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\ 
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paddh($17, $21, $3); /* y1 a1+b1 */ \ 
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psubh($17, $21, $21); /* y6 a1b1 */ \ 
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psrah($3, SHIFT_INV_COL, $17); \ 
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psrah($21, SHIFT_INV_COL, $21); \ 
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\ 
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paddh($18, $22, $2); /* y2 a2+b2 */ \ 
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psubh($18, $22, $22); /* y5 a2b2 */ \ 
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psrah($2, SHIFT_INV_COL, $18); \ 
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psrah($22, SHIFT_INV_COL, $22); \ 
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\ 
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paddh($19, $23, $3); /* y3 a3+b3 */ \ 
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psubh($19, $23, $23); /* y4 a3b3 */ \ 
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psrah($3, SHIFT_INV_COL, $19); \ 
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psrah($23, SHIFT_INV_COL, $23); 
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#define PUT(rs) \

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pminh(rs, $11, $2); \ 
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pmaxh($2, $0, $2); \ 
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ppacb($0, $2, $2); \ 
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sd3(2, 0, 4); \ 
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__asm__ __volatile__ ("add $4, $5, $4");

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#define DCT_8_INV_COL8_PUT() \

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PUT($16); \

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PUT($17); \

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PUT($18); \

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PUT($19); \

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PUT($23); \

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PUT($22); \

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PUT($21); \

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PUT($20);

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#define ADD(rs) \

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ld3(4, 0, 2); \ 
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pextlb($0, $2, $2); \ 
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paddh($2, rs, $2); \ 
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pminh($2, $11, $2); \ 
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pmaxh($2, $0, $2); \ 
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ppacb($0, $2, $2); \ 
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sd3(2, 0, 4); \ 
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__asm__ __volatile__ ("add $4, $5, $4");

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/*fixme: schedule*/

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#define DCT_8_INV_COL8_ADD() \

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ADD($16); \

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ADD($17); \

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ADD($18); \

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ADD($19); \

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ADD($23); \

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ADD($22); \

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ADD($21); \

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ADD($20);

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void ff_mmi_idct(int16_t * block)

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{ 
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/* $4 = block */

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__asm__ __volatile__("la $24, %0"::"m"(consttable[0])); 
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lq($24, ROUNDER_0, $8); 
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lq($24, ROUNDER_1, $7); 
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DCT_8_INV_ROW1($4, 0, TAB_i_04, $8, $8); 
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DCT_8_INV_ROW1($4, 16, TAB_i_17, $7, $9); 
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DCT_8_INV_ROW1($4, 32, TAB_i_26, $7, $10); 
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DCT_8_INV_ROW1($4, 48, TAB_i_35, $7, $11); 
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DCT_8_INV_ROW1($4, 64, TAB_i_04, $7, $12); 
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DCT_8_INV_ROW1($4, 80, TAB_i_35, $7, $13); 
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DCT_8_INV_ROW1($4, 96, TAB_i_26, $7, $14); 
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DCT_8_INV_ROW1($4, 112, TAB_i_17, $7, $15); 
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DCT_8_INV_COL8(); 
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DCT_8_INV_COL8_STORE($4);

296 

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//let savedtemp regs be saved

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__asm__ __volatile__(" ":::"$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23"); 
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} 
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void ff_mmi_idct_put(uint8_t *dest, int line_size, DCTELEM *block) 
303 
{ 
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/* $4 = dest, $5 = line_size, $6 = block */

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__asm__ __volatile__("la $24, %0"::"m"(consttable[0])); 
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lq($24, ROUNDER_0, $8); 
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lq($24, ROUNDER_1, $7); 
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DCT_8_INV_ROW1($6, 0, TAB_i_04, $8, $8); 
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DCT_8_INV_ROW1($6, 16, TAB_i_17, $7, $9); 
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DCT_8_INV_ROW1($6, 32, TAB_i_26, $7, $10); 
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DCT_8_INV_ROW1($6, 48, TAB_i_35, $7, $11); 
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DCT_8_INV_ROW1($6, 64, TAB_i_04, $7, $12); 
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DCT_8_INV_ROW1($6, 80, TAB_i_35, $7, $13); 
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DCT_8_INV_ROW1($6, 96, TAB_i_26, $7, $14); 
315 
DCT_8_INV_ROW1($6, 112, TAB_i_17, $7, $15); 
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DCT_8_INV_COL8(); 
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lq($24, CLIPMAX, $11); 
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DCT_8_INV_COL8_PMS(); 
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DCT_8_INV_COL8_PUT(); 
320  
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//let savedtemp regs be saved

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__asm__ __volatile__(" ":::"$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23"); 
323 
} 
324  
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326 
void ff_mmi_idct_add(uint8_t *dest, int line_size, DCTELEM *block) 
327 
{ 
328 
/* $4 = dest, $5 = line_size, $6 = block */

329 
__asm__ __volatile__("la $24, %0"::"m"(consttable[0])); 
330 
lq($24, ROUNDER_0, $8); 
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lq($24, ROUNDER_1, $7); 
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DCT_8_INV_ROW1($6, 0, TAB_i_04, $8, $8); 
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DCT_8_INV_ROW1($6, 16, TAB_i_17, $7, $9); 
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DCT_8_INV_ROW1($6, 32, TAB_i_26, $7, $10); 
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DCT_8_INV_ROW1($6, 48, TAB_i_35, $7, $11); 
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DCT_8_INV_ROW1($6, 64, TAB_i_04, $7, $12); 
337 
DCT_8_INV_ROW1($6, 80, TAB_i_35, $7, $13); 
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DCT_8_INV_ROW1($6, 96, TAB_i_26, $7, $14); 
339 
DCT_8_INV_ROW1($6, 112, TAB_i_17, $7, $15); 
340 
DCT_8_INV_COL8(); 
341 
lq($24, CLIPMAX, $11); 
342 
DCT_8_INV_COL8_PMS(); 
343 
DCT_8_INV_COL8_ADD(); 
344  
345 
//let savedtemp regs be saved

346 
__asm__ __volatile__(" ":::"$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23"); 
347 
} 
348 