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ffmpeg / libavcodec / x86 / fft_sse.c @ 5e7dfb7d

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/*
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 * FFT/MDCT transform with SSE optimizations
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 * Copyright (c) 2008 Loren Merritt
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 *
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 * This file is part of FFmpeg.
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 *
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 * FFmpeg is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2.1 of the License, or (at your option) any later version.
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 *
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 * FFmpeg is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with FFmpeg; if not, write to the Free Software
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 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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 */
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#include "libavutil/x86_cpu.h"
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#include "libavcodec/dsputil.h"
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#include "fft.h"
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DECLARE_ALIGNED(16, static const int, m1m1m1m1[4]) =
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    { 1 << 31, 1 << 31, 1 << 31, 1 << 31 };
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void ff_fft_dispatch_sse(FFTComplex *z, int nbits);
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void ff_fft_dispatch_interleave_sse(FFTComplex *z, int nbits);
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void ff_fft_calc_sse(FFTContext *s, FFTComplex *z)
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{
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    int n = 1 << s->nbits;
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    ff_fft_dispatch_interleave_sse(z, s->nbits);
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    if(n <= 16) {
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        x86_reg i = -8*n;
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        __asm__ volatile(
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            "1: \n"
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            "movaps     (%0,%1), %%xmm0 \n"
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            "movaps      %%xmm0, %%xmm1 \n"
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            "unpcklps 16(%0,%1), %%xmm0 \n"
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            "unpckhps 16(%0,%1), %%xmm1 \n"
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            "movaps      %%xmm0,   (%0,%1) \n"
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            "movaps      %%xmm1, 16(%0,%1) \n"
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            "add $32, %0 \n"
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            "jl 1b \n"
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            :"+r"(i)
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            :"r"(z+n)
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            :"memory"
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        );
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    }
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}
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void ff_fft_permute_sse(FFTContext *s, FFTComplex *z)
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{
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    int n = 1 << s->nbits;
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    int i;
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    for(i=0; i<n; i+=2) {
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        __asm__ volatile(
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            "movaps %2, %%xmm0 \n"
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            "movlps %%xmm0, %0 \n"
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            "movhps %%xmm0, %1 \n"
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            :"=m"(s->tmp_buf[s->revtab[i]]),
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             "=m"(s->tmp_buf[s->revtab[i+1]])
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            :"m"(z[i])
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        );
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    }
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    memcpy(z, s->tmp_buf, n*sizeof(FFTComplex));
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}
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void ff_imdct_half_sse(FFTContext *s, FFTSample *output, const FFTSample *input)
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{
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    av_unused x86_reg i, j, k, l;
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    long n = 1 << s->mdct_bits;
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    long n2 = n >> 1;
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    long n4 = n >> 2;
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    long n8 = n >> 3;
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    const uint16_t *revtab = s->revtab + n8;
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    const FFTSample *tcos = s->tcos;
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    const FFTSample *tsin = s->tsin;
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    FFTComplex *z = (FFTComplex *)output;
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    /* pre rotation */
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    for(k=n8-2; k>=0; k-=2) {
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        __asm__ volatile(
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            "movaps     (%2,%1,2), %%xmm0 \n" // { z[k].re,    z[k].im,    z[k+1].re,  z[k+1].im  }
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            "movaps  -16(%2,%0,2), %%xmm1 \n" // { z[-k-2].re, z[-k-2].im, z[-k-1].re, z[-k-1].im }
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            "movaps        %%xmm0, %%xmm2 \n"
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            "shufps $0x88, %%xmm1, %%xmm0 \n" // { z[k].re,    z[k+1].re,  z[-k-2].re, z[-k-1].re }
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            "shufps $0x77, %%xmm2, %%xmm1 \n" // { z[-k-1].im, z[-k-2].im, z[k+1].im,  z[k].im    }
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            "movlps       (%3,%1), %%xmm4 \n"
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            "movlps       (%4,%1), %%xmm5 \n"
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            "movhps     -8(%3,%0), %%xmm4 \n" // { cos[k],     cos[k+1],   cos[-k-2],  cos[-k-1]  }
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            "movhps     -8(%4,%0), %%xmm5 \n" // { sin[k],     sin[k+1],   sin[-k-2],  sin[-k-1]  }
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            "movaps        %%xmm0, %%xmm2 \n"
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            "movaps        %%xmm1, %%xmm3 \n"
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            "mulps         %%xmm5, %%xmm0 \n" // re*sin
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            "mulps         %%xmm4, %%xmm1 \n" // im*cos
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            "mulps         %%xmm4, %%xmm2 \n" // re*cos
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            "mulps         %%xmm5, %%xmm3 \n" // im*sin
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            "subps         %%xmm0, %%xmm1 \n" // -> re
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            "addps         %%xmm3, %%xmm2 \n" // -> im
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            "movaps        %%xmm1, %%xmm0 \n"
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            "unpcklps      %%xmm2, %%xmm1 \n" // { z[k],    z[k+1]  }
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            "unpckhps      %%xmm2, %%xmm0 \n" // { z[-k-2], z[-k-1] }
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            ::"r"(-4*k), "r"(4*k),
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              "r"(input+n4), "r"(tcos+n8), "r"(tsin+n8)
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        );
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#if ARCH_X86_64
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        // if we have enough regs, don't let gcc make the luts latency-bound
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        // but if not, latency is faster than spilling
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        __asm__("movlps %%xmm0, %0 \n"
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            "movhps %%xmm0, %1 \n"
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            "movlps %%xmm1, %2 \n"
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            "movhps %%xmm1, %3 \n"
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            :"=m"(z[revtab[-k-2]]),
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             "=m"(z[revtab[-k-1]]),
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             "=m"(z[revtab[ k  ]]),
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             "=m"(z[revtab[ k+1]])
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        );
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#else
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        __asm__("movlps %%xmm0, %0" :"=m"(z[revtab[-k-2]]));
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        __asm__("movhps %%xmm0, %0" :"=m"(z[revtab[-k-1]]));
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        __asm__("movlps %%xmm1, %0" :"=m"(z[revtab[ k  ]]));
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        __asm__("movhps %%xmm1, %0" :"=m"(z[revtab[ k+1]]));
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#endif
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    }
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    ff_fft_dispatch_sse(z, s->nbits);
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    /* post rotation + reinterleave + reorder */
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#define CMUL(j,xmm0,xmm1)\
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        "movaps   (%2,"#j",2), %%xmm6 \n"\
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        "movaps 16(%2,"#j",2), "#xmm0"\n"\
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        "movaps        %%xmm6, "#xmm1"\n"\
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        "movaps        "#xmm0",%%xmm7 \n"\
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        "mulps      (%3,"#j"), %%xmm6 \n"\
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        "mulps      (%4,"#j"), "#xmm0"\n"\
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        "mulps      (%4,"#j"), "#xmm1"\n"\
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        "mulps      (%3,"#j"), %%xmm7 \n"\
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        "subps         %%xmm6, "#xmm0"\n"\
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        "addps         %%xmm7, "#xmm1"\n"
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    j = -n2;
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    k = n2-16;
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    __asm__ volatile(
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        "1: \n"
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        CMUL(%0, %%xmm0, %%xmm1)
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        CMUL(%1, %%xmm4, %%xmm5)
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        "shufps    $0x1b, %%xmm1, %%xmm1 \n"
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        "shufps    $0x1b, %%xmm5, %%xmm5 \n"
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        "movaps   %%xmm4, %%xmm6 \n"
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        "unpckhps %%xmm1, %%xmm4 \n"
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        "unpcklps %%xmm1, %%xmm6 \n"
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        "movaps   %%xmm0, %%xmm2 \n"
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        "unpcklps %%xmm5, %%xmm0 \n"
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        "unpckhps %%xmm5, %%xmm2 \n"
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        "movaps   %%xmm6,   (%2,%1,2) \n"
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        "movaps   %%xmm4, 16(%2,%1,2) \n"
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        "movaps   %%xmm0,   (%2,%0,2) \n"
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        "movaps   %%xmm2, 16(%2,%0,2) \n"
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        "sub $16, %1 \n"
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        "add $16, %0 \n"
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        "jl 1b \n"
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        :"+&r"(j), "+&r"(k)
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        :"r"(z+n8), "r"(tcos+n8), "r"(tsin+n8)
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        :"memory"
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    );
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}
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void ff_imdct_calc_sse(FFTContext *s, FFTSample *output, const FFTSample *input)
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{
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    x86_reg j, k;
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    long n = 1 << s->mdct_bits;
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    long n4 = n >> 2;
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    ff_imdct_half_sse(s, output+n4, input);
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    j = -n;
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    k = n-16;
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    __asm__ volatile(
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        "movaps %4, %%xmm7 \n"
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        "1: \n"
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        "movaps       (%2,%1), %%xmm0 \n"
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        "movaps       (%3,%0), %%xmm1 \n"
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        "shufps $0x1b, %%xmm0, %%xmm0 \n"
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        "shufps $0x1b, %%xmm1, %%xmm1 \n"
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        "xorps         %%xmm7, %%xmm0 \n"
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        "movaps        %%xmm1, (%3,%1) \n"
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        "movaps        %%xmm0, (%2,%0) \n"
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        "sub $16, %1 \n"
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        "add $16, %0 \n"
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        "jl 1b \n"
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        :"+r"(j), "+r"(k)
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        :"r"(output+n4), "r"(output+n4*3),
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         "m"(*m1m1m1m1)
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    );
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}
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