Revision 6b6242a2 postproc/yuv2rgb.c

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postproc/yuv2rgb.c
159 159
#ifdef ARCH_X86
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/* hope these constant values are cache line aligned */
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uint64_t __attribute__((aligned(8))) mmx_00ffw = 0x00ff00ff00ff00ff;
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uint64_t __attribute__((aligned(8))) mmx_redmask = 0xf8f8f8f8f8f8f8f8;
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uint64_t __attribute__((aligned(8))) mmx_grnmask = 0xfcfcfcfcfcfcfcfc;
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uint64_t __attribute__((aligned(8))) mmx_00ffw = 0x00ff00ff00ff00ffULL;
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uint64_t __attribute__((aligned(8))) mmx_redmask = 0xf8f8f8f8f8f8f8f8ULL;
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uint64_t __attribute__((aligned(8))) mmx_grnmask = 0xfcfcfcfcfcfcfcfcULL;
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uint64_t __attribute__((aligned(8))) M24A=   0x00FF0000FF0000FFLL;
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uint64_t __attribute__((aligned(8))) M24B=   0xFF0000FF0000FF00LL;
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uint64_t __attribute__((aligned(8))) M24C=   0x0000FF0000FF0000LL;
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uint64_t __attribute__((aligned(8))) M24A=   0x00FF0000FF0000FFULL;
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uint64_t __attribute__((aligned(8))) M24B=   0xFF0000FF0000FF00ULL;
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uint64_t __attribute__((aligned(8))) M24C=   0x0000FF0000FF0000ULL;
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// the volatile is required because gcc otherwise optimizes some writes away not knowing that these
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// are read in the asm block

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