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;******************************************************************************
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;* MMX/SSE2-optimized functions for the VP6 decoder
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;* Copyright (C) 2009  Sebastien Lucas <sebastien.lucas@gmail.com>
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;* Copyright (C) 2009  Zuxy Meng <zuxy.meng@gmail.com>
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;*
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;* This file is part of Libav.
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;*
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;* Libav is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* Libav is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with Libav; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "x86inc.asm"
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%include "x86util.asm"
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cextern pw_64
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SECTION .text
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%macro DIAG4_MMX 6
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    movq          m0, [%1+%2]
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    movq          m1, [%1+%3]
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    movq          m3, m0
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    movq          m4, m1
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    punpcklbw     m0, m7
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    punpcklbw     m1, m7
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    punpckhbw     m3, m7
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    punpckhbw     m4, m7
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    pmullw        m0, [rsp+8*11] ; src[x-8 ] * biweight [0]
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    pmullw        m1, [rsp+8*12] ; src[x   ] * biweight [1]
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    pmullw        m3, [rsp+8*11] ; src[x-8 ] * biweight [0]
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    pmullw        m4, [rsp+8*12] ; src[x   ] * biweight [1]
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    paddw         m0, m1
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    paddw         m3, m4
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    movq          m1, [%1+%4]
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    movq          m2, [%1+%5]
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    movq          m4, m1
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    movq          m5, m2
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    punpcklbw     m1, m7
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    punpcklbw     m2, m7
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    punpckhbw     m4, m7
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    punpckhbw     m5, m7
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    pmullw        m1, [rsp+8*13] ; src[x+8 ] * biweight [2]
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    pmullw        m2, [rsp+8*14] ; src[x+16] * biweight [3]
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    pmullw        m4, [rsp+8*13] ; src[x+8 ] * biweight [2]
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    pmullw        m5, [rsp+8*14] ; src[x+16] * biweight [3]
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    paddw         m1, m2
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    paddw         m4, m5
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    paddsw        m0, m1
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    paddsw        m3, m4
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    paddsw        m0, m6         ; Add 64
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    paddsw        m3, m6         ; Add 64
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    psraw         m0, 7
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    psraw         m3, 7
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    packuswb      m0, m3
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    movq        [%6], m0
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%endmacro
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%macro DIAG4_SSE2 6
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    movq          m0, [%1+%2]
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    movq          m1, [%1+%3]
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    punpcklbw     m0, m7
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    punpcklbw     m1, m7
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    pmullw        m0, m4         ; src[x-8 ] * biweight [0]
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    pmullw        m1, m5         ; src[x   ] * biweight [1]
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    paddw         m0, m1
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    movq          m1, [%1+%4]
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    movq          m2, [%1+%5]
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    punpcklbw     m1, m7
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    punpcklbw     m2, m7
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    pmullw        m1, m6         ; src[x+8 ] * biweight [2]
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    pmullw        m2, m3         ; src[x+16] * biweight [3]
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    paddw         m1, m2
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    paddsw        m0, m1
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    paddsw        m0, [pw_64]    ; Add 64
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    psraw         m0, 7
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    packuswb      m0, m0
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    movq        [%6], m0
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%endmacro
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%macro SPLAT4REGS_MMX 0
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    movq         m5, m3
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    punpcklwd    m3, m3
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    movq         m4, m3
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    punpckldq    m3, m3
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    punpckhdq    m4, m4
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    punpckhwd    m5, m5
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    movq         m2, m5
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    punpckhdq    m2, m2
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    punpckldq    m5, m5
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    movq [rsp+8*11], m3
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    movq [rsp+8*12], m4
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    movq [rsp+8*13], m5
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    movq [rsp+8*14], m2
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%endmacro
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%macro SPLAT4REGS_SSE2 0
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    pshuflw      m4, m3, 0x0
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    pshuflw      m5, m3, 0x55
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    pshuflw      m6, m3, 0xAA
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    pshuflw      m3, m3, 0xFF
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    punpcklqdq   m4, m4
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    punpcklqdq   m5, m5
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    punpcklqdq   m6, m6
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    punpcklqdq   m3, m3
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%endmacro
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%macro vp6_filter_diag4 2
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; void ff_vp6_filter_diag4_<opt>(uint8_t *dst, uint8_t *src, int stride,
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;                                const int16_t h_weight[4], const int16_t v_weights[4])
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cglobal vp6_filter_diag4_%1, 5, 7, %2
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    mov          r5, rsp         ; backup stack pointer
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    and         rsp, ~(mmsize-1) ; align stack
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%ifidn %1, sse2
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    sub         rsp, 8*11
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%else
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    sub         rsp, 8*15
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    movq         m6, [pw_64]
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%endif
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%ifdef ARCH_X86_64
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    movsxd       r2, r2d
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%endif
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    sub          r1, r2
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    pxor         m7, m7
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    movq         m3, [r3]
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    SPLAT4REGS
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    mov          r3, rsp
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    mov          r6, 11
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.nextrow
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    DIAG4        r1, -1, 0, 1, 2, r3
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    add          r3, 8
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    add          r1, r2
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    dec          r6
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    jnz .nextrow
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    movq         m3, [r4]
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    SPLAT4REGS
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    lea          r3, [rsp+8]
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    mov          r6, 8
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.nextcol
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    DIAG4        r3, -8, 0, 8, 16, r0
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    add          r3, 8
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    add          r0, r2
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    dec          r6
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    jnz .nextcol
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    mov         rsp, r5          ; restore stack pointer
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    RET
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%endmacro
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INIT_MMX
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%define DIAG4      DIAG4_MMX
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%define SPLAT4REGS SPLAT4REGS_MMX
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vp6_filter_diag4 mmx,  0
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INIT_XMM
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%define DIAG4      DIAG4_SSE2
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%define SPLAT4REGS SPLAT4REGS_SSE2
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vp6_filter_diag4 sse2, 8