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ffmpeg / libavcodec / i386 / cputest.c @ a9e3707d

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/* Cpu detection code, extracted from mmx.h ((c)1997-99 by H. Dietz
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   and R. Fisher). Converted to C and improved by Gerard Lantau */
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#include <stdlib.h>
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#include "../dsputil.h"
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/* ebx saving is necessary for PIC. gcc seems unable to see it alone */
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static inline void cpuid(int index, int *eax, int *ebx, int *ecx, int *edx)
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{
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    asm ("pushl %%ebx\n\t"
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         "cpuid\n\t"
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         "movl %%ebx, %1\n\t"
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         "popl %%ebx\n\t"
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         : "=a" (*eax), "=m" (*ebx), 
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           "=c" (*ecx), "=d" (*edx)
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         : "a" (index)
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         : "cc");
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}
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/* Function to test if multimedia instructions are supported...  */
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int mm_support(void)
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{
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    int rval;
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    int eax, ebx, ecx, edx;
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    __asm__ __volatile__ (
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                          /* See if CPUID instruction is supported ... */
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                          /* ... Get copies of EFLAGS into eax and ecx */
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                          "pushf\n\t"
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                          "popl %0\n\t"
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                          "movl %0, %1\n\t"
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                          /* ... Toggle the ID bit in one copy and store */
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                          /*     to the EFLAGS reg */
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                          "xorl $0x200000, %0\n\t"
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                          "push %0\n\t"
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                          "popf\n\t"
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                          /* ... Get the (hopefully modified) EFLAGS */
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                          "pushf\n\t"
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                          "popl %0\n\t"
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                          : "=a" (eax), "=c" (ecx)
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                          :
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                          : "cc" 
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                          );
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    if (eax == ecx)
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        return 0; /* CPUID not supported */
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    cpuid(0, &eax, &ebx, &ecx, &edx);
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    if (ebx == 0x756e6547 &&
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        edx == 0x49656e69 &&
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        ecx == 0x6c65746e) {
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        /* intel */
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    inteltest:
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        cpuid(1, &eax, &ebx, &ecx, &edx);
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        if ((edx & 0x00800000) == 0)
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            return 0;
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        rval = MM_MMX;
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        if (edx & 0x02000000) 
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            rval |= MM_MMXEXT | MM_SSE;
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        if (edx & 0x04000000) 
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            rval |= MM_SSE2;
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        return rval;
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    } else if (ebx == 0x68747541 &&
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               edx == 0x69746e65 &&
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               ecx == 0x444d4163) {
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        /* AMD */
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        cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
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        if ((unsigned)eax < 0x80000001)
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            goto inteltest;
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        cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
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        if ((edx & 0x00800000) == 0)
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            return 0;
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        rval = MM_MMX;
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        if (edx & 0x80000000)
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            rval |= MM_3DNOW;
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        if (edx & 0x00400000)
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            rval |= MM_MMXEXT;
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        return rval;
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    } else if (ebx == 0x69727943 &&
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               edx == 0x736e4978 &&
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               ecx == 0x64616574) {
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        /* Cyrix Section */
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        /* See if extended CPUID level 80000001 is supported */
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        /* The value of CPUID/80000001 for the 6x86MX is undefined
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           according to the Cyrix CPU Detection Guide (Preliminary
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           Rev. 1.01 table 1), so we'll check the value of eax for
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           CPUID/0 to see if standard CPUID level 2 is supported.
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           According to the table, the only CPU which supports level
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           2 is also the only one which supports extended CPUID levels.
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        */
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        if (eax != 2) 
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            goto inteltest;
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        cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
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        if ((eax & 0x00800000) == 0)
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            return 0;
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        rval = MM_MMX;
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        if (eax & 0x01000000)
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            rval |= MM_MMXEXT;
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        return rval;
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    } else {
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        return 0;
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    }
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}