Revision bb54f6ab

View differences:

libavcodec/i386/dsputil_mmx.c
2667 2667
#endif /* CONFIG_ENCODERS */
2668 2668

  
2669 2669
#define PREFETCH(name, op) \
2670
void name(void *mem, int stride, int h){\
2670
static void name(void *mem, int stride, int h){\
2671 2671
    const uint8_t *p= mem;\
2672 2672
    do{\
2673 2673
        asm volatile(#op" %0" :: "m"(*p));\
......
3007 3007
        ff_vector_fmul_add_add_c(dst, src0, src1, src2, src3, len, step);
3008 3008
}
3009 3009

  
3010
void float_to_int16_3dnow(int16_t *dst, const float *src, int len){
3010
static void float_to_int16_3dnow(int16_t *dst, const float *src, int len){
3011 3011
    // not bit-exact: pf2id uses different rounding than C and SSE
3012 3012
    int i;
3013 3013
    for(i=0; i<len; i+=4) {
......
3022 3022
    }
3023 3023
    asm volatile("femms");
3024 3024
}
3025
void float_to_int16_sse(int16_t *dst, const float *src, int len){
3025
static void float_to_int16_sse(int16_t *dst, const float *src, int len){
3026 3026
    int i;
3027 3027
    for(i=0; i<len; i+=4) {
3028 3028
        asm volatile(
libavcodec/i386/fdct_mmx.c
67 67

  
68 68
static const int32_t fdct_r_row[2] ATTR_ALIGN(8) = {RND_FRW_ROW, RND_FRW_ROW };
69 69

  
70
struct
70
static struct
71 71
{
72 72
 const int32_t fdct_r_row_sse2[4] ATTR_ALIGN(16);
73 73
} fdct_r_row_sse2 ATTR_ALIGN(16)=
......
150 150
  29692,  -12299,   26722,  -31521,
151 151
};
152 152

  
153
struct
153
static struct
154 154
{
155 155
 const int16_t tab_frw_01234567_sse2[256] ATTR_ALIGN(16);
156 156
} tab_frw_01234567_sse2 ATTR_ALIGN(16) =

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