Revision be449fca libavcodec/bitstream.h

View differences:

libavcodec/bitstream.h
55 55
#if defined(ARCH_X86)
56 56
// avoid +32 for shift optimization (gcc should do that ...)
57 57
static inline  int32_t NEG_SSR32( int32_t a, int8_t s){
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    asm ("sarl %1, %0\n\t"
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    __asm__ ("sarl %1, %0\n\t"
59 59
         : "+r" (a)
60 60
         : "ic" ((uint8_t)(-s))
61 61
    );
62 62
    return a;
63 63
}
64 64
static inline uint32_t NEG_USR32(uint32_t a, int8_t s){
65
    asm ("shrl %1, %0\n\t"
65
    __asm__ ("shrl %1, %0\n\t"
66 66
         : "+r" (a)
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         : "ic" ((uint8_t)(-s))
68 68
    );
......
248 248
{
249 249
#    ifdef ALIGNED_BITSTREAM_WRITER
250 250
#        if defined(ARCH_X86)
251
    asm volatile(
251
    __asm__ volatile(
252 252
        "movl %0, %%ecx                 \n\t"
253 253
        "xorl %%eax, %%eax              \n\t"
254 254
        "shrdl %%cl, %1, %%eax          \n\t"
......
279 279
#        endif
280 280
#    else //ALIGNED_BITSTREAM_WRITER
281 281
#        if defined(ARCH_X86)
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    asm volatile(
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    __asm__ volatile(
283 283
        "movl $7, %%ecx                 \n\t"
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        "andl %0, %%ecx                 \n\t"
285 285
        "addl %3, %%ecx                 \n\t"
......
556 556

  
557 557
#if defined(ARCH_X86)
558 558
#   define SKIP_CACHE(name, gb, num)\
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        asm(\
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        __asm__(\
560 560
            "shldl %2, %1, %0          \n\t"\
561 561
            "shll %2, %1               \n\t"\
562 562
            : "+r" (name##_cache0), "+r" (name##_cache1)\

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