Revision be449fca libavcodec/i386/fft_sse.c
libavcodec/i386/fft_sse.c  

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if(n <= 16) { 
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x86_reg i = 8*n; 
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asm volatile(


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__asm__ volatile(


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"1: \n" 
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"movaps (%0,%1), %%xmm0 \n" 
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"movaps %%xmm0, %%xmm1 \n" 
...  ...  
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int n = 1 << s>nbits; 
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int i; 
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for(i=0; i<n; i+=2) { 
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asm volatile(


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__asm__ volatile(


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"movaps %2, %%xmm0 \n" 
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"movlps %%xmm0, %0 \n" 
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"movhps %%xmm0, %1 \n" 
...  ...  
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/* pre rotation */ 
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for(k=n82; k>=0; k=2) { 
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asm volatile(


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__asm__ volatile(


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"movaps (%2,%1,2), %%xmm0 \n" // { z[k].re, z[k].im, z[k+1].re, z[k+1].im } 
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"movaps 16(%2,%0,2), %%xmm1 \n" // { z[k2].re, z[k2].im, z[k1].re, z[k1].im } 
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"movaps %%xmm0, %%xmm2 \n" 
...  ...  
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#ifdef ARCH_X86_64 
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// if we have enough regs, don't let gcc make the luts latencybound 
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// but if not, latency is faster than spilling 
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asm("movlps %%xmm0, %0 \n"


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__asm__("movlps %%xmm0, %0 \n"


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"movhps %%xmm0, %1 \n" 
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"movlps %%xmm1, %2 \n" 
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"movhps %%xmm1, %3 \n" 
...  ...  
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"=m"(z[revtab[ k+1]]) 
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); 
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#else 
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asm("movlps %%xmm0, %0" :"=m"(z[revtab[k2]]));


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asm("movhps %%xmm0, %0" :"=m"(z[revtab[k1]]));


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asm("movlps %%xmm1, %0" :"=m"(z[revtab[ k ]]));


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asm("movhps %%xmm1, %0" :"=m"(z[revtab[ k+1]]));


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__asm__("movlps %%xmm0, %0" :"=m"(z[revtab[k2]]));


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__asm__("movhps %%xmm0, %0" :"=m"(z[revtab[k1]]));


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__asm__("movlps %%xmm1, %0" :"=m"(z[revtab[ k ]]));


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__asm__("movhps %%xmm1, %0" :"=m"(z[revtab[ k+1]]));


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#endif 
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} 
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...  ...  
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j = n2; 
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k = n216; 
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asm volatile(


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__asm__ volatile(


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"1: \n" 
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CMUL(%0, %%xmm0, %%xmm1) 
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CMUL(%1, %%xmm4, %%xmm5) 
...  ...  
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j = n; 
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k = n16; 
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asm volatile(


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__asm__ volatile(


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"movaps %4, %%xmm7 \n" 
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"1: \n" 
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"movaps (%2,%1), %%xmm0 \n" 
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