Revision be449fca libavcodec/ppc/dsputil_ppc.c

View differences:

libavcodec/ppc/dsputil_ppc.c
148 148
        i += 16;
149 149
    }
150 150
    for ( ; i < sizeof(DCTELEM)*6*64-31 ; i += 32) {
151
        asm volatile("dcbz %0,%1" : : "b" (blocks), "r" (i) : "memory");
151
        __asm__ volatile("dcbz %0,%1" : : "b" (blocks), "r" (i) : "memory");
152 152
    }
153 153
    if (misal) {
154 154
        ((unsigned long*)blocks)[188] = 0L;
......
181 181
    }
182 182
    else
183 183
        for ( ; i < sizeof(DCTELEM)*6*64 ; i += 128) {
184
            asm volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory");
184
            __asm__ volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory");
185 185
        }
186 186
#else
187 187
    memset(blocks, 0, sizeof(DCTELEM)*6*64);
......
219 219

  
220 220
    /* below the constraint "b" seems to mean "Address base register"
221 221
       in gcc-3.3 / RS/6000 speaks. seems to avoid using r0, so.... */
222
    asm volatile("dcbzl %0, %1" : : "b" (fakedata_middle), "r" (zero));
222
    __asm__ volatile("dcbzl %0, %1" : : "b" (fakedata_middle), "r" (zero));
223 223

  
224 224
    for (i = 0; i < 1024 ; i ++) {
225 225
        if (fakedata[i] == (char)0)
......
241 241
{
242 242
    register const uint8_t *p = mem;
243 243
    do {
244
        asm volatile ("dcbt 0,%0" : : "r" (p));
244
        __asm__ volatile ("dcbt 0,%0" : : "r" (p));
245 245
        p+= stride;
246 246
    } while(--h);
247 247
}

Also available in: Unified diff