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##############################################
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# Makefile for hello-boost-graph program
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##############################################
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INCLUDES = -I/usr/local/boost/
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# define the C source files
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SRCS = bi_connected_components.cpp graph_manager.cpp parser.cpp sub_component.cpp utility.cpp
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# define the C object files
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#
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# This uses Suffix Replacement within a macro:
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#   $(name:string1=string2)
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#         For each word in 'name' replace 'string1' with 'string2'
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# Below we are replacing the suffix .c of all words in the macro SRCS
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# with the .o suffix
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#
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OBJS = $(SRCS:.cpp=.o)
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MAIN = main
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MAIN_BIN = graph-parser
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SIMULATION = simulation
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# all: ../bin/$(MAIN)
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# 	@echo  Simple compiler named main has been compiled
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$(MAIN): $(MAIN).o $(SIMULATION).o $(OBJS)
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	$(CXX) $(CFLAGS) $(INCLUDES) -o $(MAIN_BIN) $(MAIN).o $(OBJS) $(LFLAGS) $(LIBS )
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	$(CXX) $(CFLAGS) $(INCLUDES) -o $(SIMULATION) $(SIMULATION).o $(OBJS) $(LFLAGS) $(LIBS )
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$(SIMULATION): $(SIMULATION).o $(OBJS)
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	$(CXX) $(CFLAGS) $(INCLUDES) -o $(SIMULATION) $(SIMULATION).o $(OBJS) $(LFLAGS) $(LIBS )
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# this is a suffix replacement rule for building .o's from .c's
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# it uses automatic variables $<: the name of the prerequisite of
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# the rule(a .c file) and $@: the name of the target of the rule (a .o file)
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# (see the gnu make manual section about automatic variables)
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.cpp.o:
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	$(CXX) $(CFLAGS) $(INCLUDES) -std=c++11 -c $<  -o $@
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# remove object files and executable when user executes "make clean"
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clean:
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	$(RM) *.o $(BIN_FILE)